Part Number Hot Search : 
LBT14075 ASM0402C BSO615N CY7C4292 D1776 STUB056 LBT14075 BR2506
Product Description
Full Text Search
 

To Download IRS21362JTRPBF Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
  www.irf.com 1 3-phase bridge driver packages description the irs2136x are high voltage, high speed power mosfet and igbt driver with three independent high side and low side referenced output channels for 3-phase applications. proprietary hvic technology enables ruggedized monolit hic construction. logic inputs are compatible with cmos or lsttl outputs, down to 3.3 v logic. a current trip function which terminates all six outputs can be derived from an ex ternal current sense resistor. an enable function is available to terminate all six outputs simultaneously. an open-drain fault signal is provided to indicate that an overcurrent or undervoltage shutdown has occurr ed. overcurrent fault conditions are cleared automatically afte r a delay programmed externally via an rc network connected to the rcin input. the output drivers feature a high pulse current buff er stage designed for minimum driver cross-conduc tion. propagation delays are matched to simplify use in high frequency applicatio ns. the floating channels can be used to drive n-channel power mosfets or igbts in the high side configuration which operates up to 600 v. part irs2136 irs21362 irs21363 irs21365 irs21366 irs21367 irs21368 input logic ___ ___ hin, lin ___ hin, lin ___ ___ hin, lin ___ ___ hin, lin ___ ___ hin, lin ___ ___ hin, lin ___ ___ hin, lin t on (typ.) 530 ns 530 ns 530 ns 530 ns 200 ns 200 ns 530 ns t off (typ.) 530 ns 530 ns 530 ns 530 ns 200 ns 200 ns 530 ns v ih (min.) 2.5 v 2.5 v 2.5 v 2.5 v 2.5 v 2.5 v 2.5 v v il (max.) 0.8 v 0.8 v 0.8 v 0.8 v 0.8 v 0.8 v 0.8 v v itrip+ 0.46 v 0.46 v 0.46 v 4.3 v 0.46 v 4.3 v 4.3 v v ccuv+ / v bsuv+ 8.9 v 10.4 v 11.1 v 11.1 v 11.1 v 11.1 v 8.9 v v ccuv- / v bsuv- 8.2 v 9.4 v 10.9 v 10.9 v 10.9 v 10.9 v 8.2 v features ? floating channel designed for bootstrap operation ? fully operational to +600 v ? tolerant to negative transi ent voltage, dv/dt immune ? gate drive supply range from 10 v to 20 v (irs2136/ irs21368), 11.5 v to 20 v (irs21362), or 12 v to 20 v (irs21363/irs21365/irs21366/irs21367 ? undervoltage lockout for all channels ? over-current shutdown turns off all six drivers ? independent 3 half-bridge drivers ? matched propagation delay for all channels ? cross-conduction prevention logic ? low side output out of phase wi th inputs. high side outputs out of phase (irs213(6,63, 65, 66, 67, 68)), or in phase (irs21362) with inputs ? 3.3 v logic compatible ? lower di/dt gate drive for better noise immunity ? externally programmable delay for automatic fault clear ? all parts are lead-free irs2136/irs21362/irs21363/irs21365/ irs21366/irs21367/irs21368 (j&s) pbf 28-lead soic 28-lead pdip 44-lead plcc w/o 12 leads applications: *motor control *air conditioners/ washing machines *general purpose inverters *micro/mini inverter drives preliminary data sheet no. pd60272 feature com p arison: irs2136x typical connection
www.irf.com 2 irs213(6,62,63,65,66,67,68) (j&s)pbf absolute maximum ratings absolute maximum ratings indicate sustained limits be yond which damage to the device may occur. all voltage parameters are absolute voltages referenced to com. t he thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. zener clamps are included between v cc & com (25 v), v cc & v ss (20v), and v bx & v sx (20 v). recommended operating conditions the input/output logic-timing diagram is shown in fig. 1. for proper operation the device should be used within the recommended conditions. all voltage parameters are absolute referenced to com. the v s & v ss offset ratings are tested with all supplies biased at a 15 v differential. symbol definition min. max. units irs213(6,68) v s1,2,3 +10 v s1,2,3 + 20 irs21362 v s1,2,3 +11.5 v s1,2,3 + 20 v b1,2,3 high side floating supply voltage irs213(6,63,65,66,67) v s1,2,3 +12 v s1,2,3 + 20 v s1,2,3 high side floating supply voltage note 1 600 irs213(6,68) 10 20 irs21362 11.5 20 v cc low side supply voltage irs213(6,63,65,66,67) 12 20 v ho1,2,3 high side output voltage v s1,2,3 v b1,2,3 v lo1,2,3 low side output voltage 0 v cc v ss logic ground -5 5 v flt fault output voltage v ss v cc v rcin rcin input voltage v ss v cc v note 1: logic operational for v s of (com - 8 v) to (com + 600 v). logic state held for v s of (com - 8 v) to (com ?v bs ). (please refer to the design tip dt97-3 for more details). symbol definition min. max. units v s high side offset voltage v b 1,2,3 - 20 v b 1,2,3 + 0.3 v b high side floating supply voltage -0.3 625 v ho1,2,3 high side floating output voltage v s1,2,3 - 0.3 v b 1,2,3 + 0.3 v cc low side and logic fixed supply voltage -0.3 25 v ss logic ground v cc - 20 v cc + 0.3 v lo1,2,3 low side output voltage -0.3 v cc + 0.3 v in input voltage lin, hi n, itrip, en, rcin v ss -0.3 v cc + 0.3 v flt fault output voltage v ss -0.3 v cc + 0.3 v dv/dt allowable offset voltage slew rate ? 50 v/ns (28 lead pdip) ? 1.5 (28 lead soic) ? 1.6 p d package power dissipation @ t a preliminary
www.irf.com 3 irs213(6,62,63,65,66,67,68) (j&s)pbf recommended operating c onditions - (continued) the input/output logic-timing diagram is shown in fig. 1. for proper operation the device should be used within the recommended conditions. all voltage parameters are absolute referenced to com. the v s & v ss offset ratings are tested with all supplies biased at a 15 v differential. symbol definition min. max. units v itrip itrip input voltage v ss v ss + 5 v in logic input voltage lin, hin (irs213(6,63,65,66,67,68)), lin, hin (irs21362), en v ss v ss + 5 v t a ambient temperature -40 125 c note 1: hin, lin, en and the itrip pin are internally clamped with a 5.2 v zener diode. static electrical characteristics v bias (v cc ,v bs1,2,3 ) = 15 v unless otherwise specified. the v in , v th , and i in parameters are referenced to v ss and are applicable to all six channels (hin1, 2,3/hin1,2,3 and lin1,2,3). the v o and i o parameters are referenced to com and v s1,2,3 and are applicable to the respective output leads: lo 1,2,3 and ho1,2,3. symbol definition min. typ. max. units test conditions logic ?0? input voltage lin1,2,3, hin1,2,3 irs213(6,63,65) logic ?1? input voltage hin1,2,3 irs21362 2.5 ? ? v ih logic ?0? input voltage lin1,2,3, hin1,2,3 irs213(66,67,68) 2.5 ? ? logic ?1? input voltage lin1,2,3, hin1,2,3 irs213(6,63,65) logic ?0? input voltage hin1,2,3 irs21362 v il logic ?0? input voltage lin1,2,3, hin1,2,3 irs213(66,67,68) ? ? 0.8 v in , th+ input positive going threshold ? 1.9 ? v in , th- input negative going threshold ? 1 ? v en,th+ enable positive going threshold ? ? 2.5 v en,th- enable negative going threshold 0.8 ? ? v it,th+ (6,62,63,66) itri p positive going threshold 0.37 0.46 0.55 v it,hys (6,62,63,66) itrip hy steresis ? 0.07 ? v it,th+ (65,67,68) itrip positive goi ng threshold 3.85 4.3 4.75 v it,hys (65,67,68) itrip hy steresis ? 0.15 ? v rcin, th+ rcin positive going threshold ? 8 ? v rcin, hys rcin hysteresis ? 3 ? v oh high level output voltage, v bias - v o ? 0.9 1.4 v ol low level output voltage, v o ? 0.4 0.6 io = 20 ma v ccuv+ (6,68) v cc supply undervoltage positive going threshold 8 8.9 9.8 v ccuv- (6,68) v cc supply undervoltage negative going threshold 7.4 8.2 9 v ccuvhy (6,68) v cc supply undervoltage hysteresis 0.3 0.7 ? v bsuv+ (6,68) v bs supply undervoltage positive going threshold 8 8.9 9.8 v prelim i nary
www.irf.com 4 irs213(6,62,63,65,66,67,68) (j&s)pbf static electrical charact eristics - (continued) v bias (v cc ,v bs1,2,3 ) = 15 v unless otherwise specified. the v in , v th , and i in parameters are referenced to v ss and are applicable to all six channels (hin1, 2,3/ hin1,2,3 and lin1,2,3). the v o and i o parameters are referenced to com and v s1,2,3 and are applicable to the respective output leads: lo 1,2,3 and ho1,2,3. symbol definition min. typ. max. units test conditions v bsuv- (6,68) v bs supply undervoltage negative going threshold 7.4 8.2 9 v bsuvhy (6,68) v bs supply undervoltage hysteresis 0.3 0.7 ? v ccuv+ (62) v cc supply undervoltage positive going threshold 9.6 10.4 11.2 v ccuv- (62) v cc supply undervoltage negative going threshold 8.6 9.4 10.2 v ccuvhy (62) v cc supply undervoltage hysteresis 0.5 1 ? v bsuv+ (62) v bs supply undervoltage positive going threshold 9.6 10.4 11.2 v bsuv- (62) v bs supply undervoltage negative going threshold 8.6 9.4 10.2 v bsuvhy (62) v bs supply undervoltage hysteresis 0.5 1 ? v ccuv+ (63,65,66,67) v cc supply undervoltage positive going threshold 10.4 11.1 11.6 v ccuv- (63,65,66,67) v cc supply undervoltage negative going threshold 10.2 10.9 11.4 v ccuvhy (63,65,66,67) v cc supply undervoltage hysteresis ? 0.2 ? v bsuv+ (63,65,66,67) v bs supply undervoltage positive going threshold 10.4 11.1 11.6 v bsuv- (63,65,66,67) v bs supply undervoltage negative going threshold 10.2 10.9 11.4 v bsuvhy (63,65,66,67) v bs supply undervoltage hysteresis ? 0.2 ? v i lk offset supply leakage current ? ? 50 v b =v s = 600 v i qbs quiescent v bs supply current ? 70 120 a i qcc quiescent v cc supply current ? 2 3 ma all inputs are in off state v in,clamp input clamp voltage (hin, lin, itrip and en) 4.8 5.2 5.65 v i in =100 a i lin+ (6,62,63,65) input bias cu rrent (lout = hi) ? 110 150 v in =4 v i lin- (6,62,63,65) input bias cu rrent (lout = lo) ? 150 200 v in 0 v i lin+ (66,67,68) input bias current (lout = hi) ? ? 3 v in =4 v i lin- (66,67,68) input bias cu rrent (lout = lo) ? ? 3 v in =0 v i hin+ (6,63,65) input bias current (hout = hi) ? 110 150 v in =4 v i hin- (6,63,65) input bias current (hout = lo) ? 150 200 v in =0 v i hin+ (62) input bias current (hout = hi) ? 5 20 v in =4 v i hin- (62) input bias current (hout = lo) ? ? 3 v in =0 v i hin+ (66,67,68) input bias current (hout = hi) ? ? 3 v in =4 v i hin- (66,67,68) input bias current (hout = lo) ? ? 3 v in =0 v i itrip+ ?high? itrip input bias current ? 5 40 v in =4 v i itrip- ?low? itrip input bias current ? ? 1 v in =0 v i en+ ?high? enable input bias current ? 5 40 v in =4 v i en- ?low? enable input bias current ? ? 1 a v in =0 v prelim i nary
www.irf.com 5 irs213(6,62,63,65,66,67,68) (j&s)pbf static electrical charact eristics - (continued) v bias (v cc ,v bs1,2,3 ) = 15 v unless otherwise specified. the v in , v th , and i in parameters are referenced to v ss and are applicable to all six channels (hin1, 2,3/hin1,2,3 and lin1,2,3). the v o and i o parameters are referenced to com and v s1,2,3 and are applicable to the respective output leads: lo 1,2,3 and ho1,2,3. symbol definition min. typ. max. units test conditions i rcin rcin input bias current ? ? 1 a v rcin = 0 v or 15 v i o+ output high short circuit pulsed current 120 200 ? vo =0 v, pw ? ? prelim i nary prelim i nary
www.irf.com 6 irs213(6,62,63,65,66,67,68) (j&s)pbf en itrip fault hin1,2,3 hin1,2,3 lin1,2,3 rcin ho1,2,3 lo1,2,3 fig. 1. input/output timing diagram 90% ten en 50% lin1,2,3 hin1,2,3 50% 50% 50% 50% pw in lin1,2,3 hin1,2,3 tr 10% ho1,2,3 lo1,2,3 90% tf ton toff 90% 10% ho1,2,3 lo1,2,3 pw out fig. 2. switching time waveforms fig. 3. output enable timing waveform prelim i nary
www.irf.com 7 irs213(6,62,63,65,66,67,68) (j&s)pbf hin1,2,3 lin1,2,3 50% 50% l in 1 ,2 ,3 hin1,2,3 lo 1,2,3 ho 1,2,3 50% 50% 50% 50% dt 50% 50% dt fig. 4. internal deadtime timing waveforms rcin itrip fault any ouput titrip 50% 50% 90% tflt 50% tfltclr 50% fig. 5. itrip/rcin timing waveforms on off on hin/lin t in,fil low t in,fil n on off off high ho/lo fig. 6. input filter function prelim i nary
www.irf.com 8 irs213(6,62,63,65,66,67,68) (j&s)pbf lead definitions symbol description v cc low side supply voltage v ss logic ground hin1,2,3 hin1,2,3 logic inputs for high side gate driver outputs (ho1,2,3), out of phase [irs213(6,63,65,66,67,68)] logic inputs for high side gate driver outputs (ho1,2,3), in phase (irs21362) lin1,2,3 logic input for low side gate driver outputs (lo1,2,3), out of phase fault indicates over-current (itrip) or low-side under voltage lockout has occurred. negative logic, open-drain output en logic input to enable i/o functionalit y. i/o logic functions when enable is high (i.e., positive logic). no effect on fault and not latched itrip analog input for overcurrent shutdown. when acti ve, itrip shuts down outputs and activates fault and rcin low. when itrip becomes inactive, fault stays active low for an externally set time t fltclr , then automatically becomes inactive (open-drain high impedance). rcin external rc network input used to define fault clear delay, t fltclr, approximately equal to r*c. when rcin>8 v, the fault pin goes back into open-drain high-impedance com low side gate drivers return v b1,2,3 high side floating supply ho1,2,3 high side gate driver outputs v s1,2,3 high voltage floating supply return lo1,2,3 low side driver sourcing outputs note : lin, hin, en, and itrip are internally clamped with a 5.2 v zener diode. prelim i nary
www.irf.com 9 irs213(6,62,63,65,66,67,68) (j&s)pbf lead assignments prelim i nary
www.irf.com 10 irs213(6,62,63,65,66,67,68) (j&s)pbf functional block diagram prelim i nary
www.irf.com 11 irs213(6,62,63,65,66,67,68) (j&s)pbf functional block diagram prelim i nary
www.irf.com 12 irs213(6,62,63,65,66,67,68) (j&s)pbf functional block diagram prelim i nary
www.irf.com 13 irs213(6,62,63,65,66,67,68) (j&s)pbf functional block diagram vcc vbs itrip enable fault lo1,2,3 ho1,2,3 v itrip 5 v 0 (note 3) 0 0 15 v 15 v 0 v 0 v high imp 0 0 note 1: a shoot-through prevention logic pr events lo1,2,3 and ho1, 2,3 for each channel from turning on simultaneously. note 2: uvcc is not latched, when v cc > uvcc, fault returns to high impedance. note 3: when v bs < uvbs, ho goes low. after v bs goes higher than uvbs, ho stays low until a new falling irs213(6,63,65,66,67 ,68) or rising irs21362 transition of hin. note 4: when itrip < v itrip , fault returns to high-impedance after rcin pin becomes greater than 8 v (@ v cc = 15 v). prelim i nary
www.irf.com 14 irs213(6,62,63,65,66,67,68) (j&s)pbf 1 pcb layout tips 1.1 distance from h to l voltage the irs2136xj package lacks some pins (see page 11) in order to maximizing the distance between the high voltage and low voltage pins. it?s strongly recommended to place the components tied to the floating voltage in the respective high voltage portions of the device (v b1,2,3 , v s1,2,3 ) side. 1.2 ground plane to minimize noise coupling ground plane must not be plac ed under or near the high voltage floating side. 1.3 gate drive loops current loops behave like an antenna able to receive and transmi t em noise (see fig. 7). in order to reduce em coupling and improve the power switch turn on/off performances, gat e drive loops must be reduced as much as possible. moreover, current can be injected inside the gate drive loop via the igbt collecto r-to-gate parasitic capacitance. the parasitic auto-inductance of the gate loop contributes to develop a vo ltage across the gate-emitter increasing the possibility of self turn-on effect. fig. 7. antenna loops 1.4 supply capacitors supply capacitors must be placed as cl ose as possible to the device pins (v cc and v ss for the ground tied supply, v b and v s for the floating supply) in order to mi nimize parasitic inductance/resistance. 1.5 routing and placement power stage pcb parasitic may generate dangerous voltage trans ients for the gate driver an d the control logic. in particular it?s recommended to limit phase voltage negative transients. in order to avoid such undervoltage it is highly recommended to minimize high side emitter to low side collector distance and low side emitter to negative bus ra il stray inductance. see dt04-4 at www.irf.com for more detai led information. prelim i nary
www.irf.com 15 irs213(6,62,63,65,66,67,68) (j&s)pbf figures 8-28 provide information on the experimental performance of the irs2136s hvic. the line plotted in each figure is generated from actual lab data. a large number of individ ual samples were tested at three temperatures (-40 oc, 25 oc, and 125 oc) in order to generate the experimental (exp.) curve. the line labeled exp. consist of three data points (one data point at each of the tested temper atures) that have been connected together to illustrate the understood trend. the individual data points on the curve were determined by calculat ing the averaged experimental value of the parameter (for a given temperature). fig. 8. turn-on propagatio n delay vs. temperature fig. 9. turn-off propagat ion delay vs. temperature fig. 10. turn-on rise time vs. temperature fig. 11. turn-off fall time vs. temperature 0 25 50 75 100 -50 -25 0 25 50 75 100 125 temperature ( o c) turn-off fall time (ns) exp . 0 200 400 600 800 1000 -50 -25 0 25 50 75 100 125 temperature ( o c) turn-on propagation delay (ns) exp . 0 200 400 600 800 1000 -50 -25 0 25 50 75 100 125 temperature ( o c) turn-off propagation delay (ns ) exp . 0 75 150 225 300 -50 -25 0 25 50 75 100 125 temperature ( o c) turn-on rise time (ns) exp . prelim i nary
www.irf.com 16 irs213(6,62,63,65,66,67,68) (j&s)pbf fig. 12. dt propagatio n delay vs. temperature fig. 13. titrip propagatio n delay vs. temperature fig. 14. itrip to fa ult propagation delay vs. tem p erature fig. 15. ten sd propagati on delay vs. temperature fig. 16. rcin low on re sistance vs. temperature fig. 17. fault low on resistance vs. temperature 0 300 600 900 1200 1500 -50 -25 0 25 50 75 100 125 temperature ( o c) titrip propagation delay (ns) exp . 0 200 400 600 800 1000 1200 -50 -25 0 25 50 75 100 125 temperature ( o c) itrip to fault propagation delay (ns) exp. 0 200 400 600 800 1000 -50 -25 0 25 50 75 100 125 temperature ( o c) ten sd propagation delay (ns) exp. 0 20 40 60 80 100 -50-250255075100125 temperature ( o c) rcin low on resistance ( ohm) exp . 0 20 40 60 80 100 -50 -25 0 25 50 75 100 125 temperature ( o c) fault low on resistance ( ohm) exp . 0 150 300 450 600 -50 -25 0 25 50 75 100 125 temperature ( o c) dt propagation delay (ns) exp . prelim i nary
www.irf.com 17 irs213(6,62,63,65,66,67,68) (j&s)pbf fig. 18. v cc quiescent current vs. temperature fig. 19. v bs quiescent current vs. temperature fig. 20. v ccuv+ threshold vs. temperature fig. 21. v ccuv- threshold vs. temperature fig. 22. v bsuv+ threshold vs. temperature fig. 23. v bsuv- threshold vs. temperature 0 1 2 3 4 5 -50 -25 0 25 50 75 100 125 temperature ( o c) v cc quiescent current (ma) exp . 0 20 40 60 80 100 120 -50 -25 0 25 50 75 100 125 temperature ( o c) v bs quiescent current (ua) exp . 0 2 4 6 8 10 12 -50 -25 0 25 50 75 100 125 temperature ( o c) v ccuv+ threshold (v) exp . 0 2 4 6 8 10 12 -50 -25 0 25 50 75 100 125 temperature ( o c) v ccuv- threshold (v) exp . 5 6 7 8 9 10 -50 -25 0 25 50 75 100 125 temperature ( o c) v bsuv+ threshold (v) exp. 5 6 7 8 9 10 -50 -25 0 25 50 75 100 125 temperature ( o c) v bsuv+ threshold (v) exp . prelim i nary
www.irf.com 18 irs213(6,62,63,65,66,67,68) (j&s)pbf fig. 24. i trip th+ vs. temperature fig. 25. i trip th- vs. temperature fig. 26. i o+ l1 sc pulsed current vs. temperature fig. 27. i o- l1 sc pulsed current vs. temperature fig. 28. itrip input bias current vs. temperature 200 400 600 800 -50 -25 0 25 50 75 100 125 temperature ( o c) i trip th+ (mv) ex p. 0 200 400 600 800 -50 -25 0 25 50 75 100 125 temperature ( o c) i trip th- (mv) exp . 0.00 0.05 0.10 0.15 0.20 0.25 0.30 -50-250 255075100125 temperature ( o c) i o+ l1 sc pulsed currentt (a) exp . 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50 -50 -25 0 25 50 75 100 125 temperature ( o c) output low short circuit current (a) exp. 0 4 8 12 16 -50 -25 0 25 50 75 100 125 temperature ( o c) itrip input bias current (ua) exp . prelim i nary
www.irf.com 19 irs213(6,62,63,65,66,67,68) (j&s)pbf case outlines prelim i nary
www.irf.com 20 irs213(6,62,63,65,66,67,68) (j&s)pbf case outlines prelim i nary
www.irf.com 21 irs213(6,62,63,65,66,67,68) (j&s)pbf carrier tape dimension for 28soicw code min max min max a 11.90 12.10 0.468 0.476 b 3.90 4.10 0.153 0.161 c 23.70 24.30 0.933 0.956 d 11.40 11.60 0.448 0.456 e 10.80 11.00 0.425 0.433 f 18.20 18.40 0.716 0.724 g 1.50 n/a 0.059 n/a h 1.50 1.60 0.059 0.062 metric imperial reel dimensions for 28soicw code min max min max a 329.60 330.25 12.976 13.001 b 20.95 21.45 0.824 0.844 c 12.80 13.20 0.503 0.519 d 1.95 2.45 0.767 0.096 e 98.00 102.00 3.858 4.015 f n/a 30.40 n/a 1.196 g 26.50 29.10 1.04 1.145 h 24.40 26.40 0.96 1.039 metric imperial e f a c d g a b h n ote : controlling dimension in mm loaded tape feed direction a h f e g d b c prelim i nary
www.irf.com 22 irs213(6,62,63,65,66,67,68) (j&s)pbf carrier tape dimension for 44plcc code min max min max a 23.90 24.10 0.94 0.948 b 3.90 4.10 0.153 0.161 c 31.70 32.30 1.248 1.271 d 14.10 14.30 0.555 0.562 e 17.90 18.10 0.704 0.712 f 17.90 18.10 0.704 0.712 g 2.00 n/a 0.078 n/a h 1.50 1.60 0.059 0.062 metric imperial reel dimensions for 44plcc code min max min max a 329.60 330.25 12.976 13.001 b 20.95 21.45 0.824 0.844 c 12.80 13.20 0.503 0.519 d 1.95 2.45 0.767 0.096 e 98.00 102.00 3.858 4.015 f n/a 38.4 n/a 1.511 g 34.7 35.8 1.366 1.409 h 32.6 33.1 1.283 1.303 metric imperial e f a c d g a b h n ote : controlling dimension in mm loaded tape feed direction a h f e g d b c prelim i nary
www.irf.com 23 irs213(6,62,63,65,66,67,68) (j&s)pbf worldwide headquarters: 233 kansas street, el segundo, ca 90245 tel: (310) 252-7105 this part has been qualified per in dustrial level http://www.irf.com data and specifications subject to change without notice. 5/19/2006 order information 28-lead pdip irs2136pbf 28-lead pdip irs21362pbf 28-lead pdip irs21363pbf 28-lead pdip irs21365pbf 28-lead pdip irs21366pbf 28-lead pdip irs21367pbf 28-lead pdip irs21368pbf 28-lead soic irs2136spbf 28-lead soic irs21362spbf 28-lead soic irs21363spbf 28-lead soic irs21365spbf 28-lead soic irs21366spbf 28-lead soic irs21367spbf 28-lead soic irs21368spbf 44-lead plcc irs2136jpbf 44-lead plcc irs21362jpbf 44-lead plcc irs21363jpbf 44-lead plcc irs21365jpbf 44-lead plcc irs21366jpbf 44-lead plcc irs21367jpbf 44-lead plcc irs21368jpbf 28-lead soic tape & reel irs2136strpbf 28-lead soic tape & reel irs21362strpbf 28-lead soic tape & reel irs21363strpbf 28-lead soic tape & reel irs21365strpbf 28-lead soic tape & reel irs21366strpbf 28-lead soic tape & reel irs21367strpbf 28-lead soic tape & reel irs21368strpbf 44-lead plcc tape & reel irs2136jtrpbf 44-lead plcc tape & reel IRS21362JTRPBF 44-lead plcc tape & reel irs21363jtrpbf 44-lead plcc tape & reel irs21365jtrpbf 44-lead plcc tape & reel irs21366jtrpbf 44-lead plcc tape & reel irs21367jtrpbf 44-lead plcc tape & reel irs21368jtrpbf prelim i nary


▲Up To Search▲   

 
Price & Availability of IRS21362JTRPBF

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X